TrustIC joins Synopsys SystemVerilog Catalyst and VMM Catalyst Programs
In the same time, TrustIC has joined the Synopsys VMM Catalyst program which promotes the development and use of EDA tools, verification IP, training and services supporting the VMM verification methodology.
TrustIC's support for the VMM verification methodology is proven by the alternative simulator independent VMM verification library which was developed by TrustIC in order to increase the visibility of the VMM verification methodology to all verification engineers, regardless of their simulator of choice.
TrustIC's is also one of the first companies offering SystemVerilog verification services and IPs.
About TrusIC's VMM verification library:
Since the VMM methodology is derived from the Synopsys's Vera RVM methodology, the VMM is not currently supported by all EDA vendors and therefore the adoption of VMM is somehow slower, because companies prefer to have their IPs tool independent. The TrustIC VMM implementation is solving this issue by allowing the usage of VMM in all SystemVerilog simulators.
The TrustIC's VMM implementation is fully complying with the IEEE 1800-2005 SystemVerilog standard so that the users can use it with any simulation tool and have the same results when running with different tools.
About TrustIC:
TrustIC team is a group of very experienced and talented digital design&verification and software engineers that have a long and very valuable record of achievements in helping organizations achieve competitive advantages by focusing on time-to-market, effectiveness and design quality.
The TrustIC team has built its experience while working for several wireless network platforms. Working on these platforms exposed us to cutting edge design & verification technologies and tools. Our engineers are experts in SoC interconnect, power management and image processing.
TrustIC joins Synopsys SystemVerilog Catalyst and VMM Catalyst Programs
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